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eeDesign is the comprehensive source of information for electronics design tools and methodologies. Its scope includes EDA tools, silicon intellectual property (IP), chip design methodologies, and chip and system architectures. Your feedback is welcome.


  eeDesign Exclusives
Practical Power Network Synthesis For Power-Gating Designs
The article describes a method for properly sizing sleep transistors in power network synthesis. It introduces the concept of a "fake via" to enable power network synthesis using existing EDA tools.More »

  Headlines for Monday Oct 6, 2008
Business
  • TSMC reportedly settles with IP licensor
  • Engineering jobs: Implosion or same old same old?
  • German IP firm launches 1080p video codec
  • ARMv8 instruction set will be application driven, says exec
    Products
  • CFL and LED lamps: White light in a 'green' world
  • Low-power chips pack 'em in
  • FBM could leave DRAM in the dust


      Headlines for Friday Oct 3, 2008
    Business
  • Apple denies report of Steve Jobs heart attack
  • Decoding the opportunities in DTVs
    Technology
  • Comment: A skeptic's view of the Microchip/Atmel merger
  • Technology Week in Review: Powerful trees, underwater helicopters


      Headlines for Thursday Oct 2, 2008
    Business
  • Magma to restructure operations, reduce workforce
    Technology
  • Freescale's Su: Sharing is key
  • Analysis: Fraunhofer advances audio compression
    Products
  • German foundry startup rolls design kit


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      Design Resources
    Designing for a dual Galileo-based GPS system
    Malcolm Lomer of SiGe Semiconductor discusses GPS design challenges with the Galileo satellite system.
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